In some computing systems, a processor integrated circuit stores data in a memory integrated circuit during write operations. The processor integrated circuit accesses stored data from the memory integrated circuit during read operations. In a source synchronous system, a timing signal is transmitted between the processor and memory integrated circuits along with the data during read and write operations.
During a write operation, write data and a timing signal are transmitted from the processor integrated circuit to the memory integrated circuit. A buffer circuit in the memory integrated circuit buffers the timing signal to generate a buffered timing signal. The buffered timing signal is provided to receiving circuits in the memory integrated circuit. Each of the receiving circuits in the memory integrated circuit includes a replica circuit. The replica circuits delay the write data to generate delayed write data signals. Each of the replica circuits generates a delay in one of the delayed write data signals that matches the delay provided to the buffered timing signal by the buffer circuit. The receiving circuits in the memory integrated circuit capture the write data in the delayed write data signals. The write data is stored in a memory circuit.
During a read operation, read data and a timing signal are transmitted from the memory integrated circuit to the processor integrated circuit. A buffer circuit in the processor integrated circuit buffers the timing signal to generate a buffered timing signal. The buffered timing signal is provided to receiving circuits in the processor integrated circuit. Each of the receiving circuits in the processor integrated circuit includes a replica circuit. The replica circuits in the processor integrated circuit delay the read data to generate delayed read data signals. Each of the replica circuits generates a delay in one of the delayed read data signals that matches the delay provided to the buffered timing signal by the buffer circuit in the processor integrated circuit. The receiving circuits in the processor integrated circuit capture the read data in the delayed read data signals.